verilog中有符号与无符号变量区别 无符号变量和有符号变量的区别
verilog \u4e2dreg\u9ed8\u8ba4\u662f\u6709\u7b26\u53f7\u6570\u8fd8\u662f\u65e0\u7b26\u53f7\u6570\u662f\u65e0\u7b26\u53f7\u6570\uff0c\u5b83\u8868\u793a\u5bc4\u5b58\u5668\u7c7b\u578b\u53d8\u91cf\uff0c\u662f\u4e8c\u8fdb\u5236\u7f16\u7801\uff0c\u800c\u4e0d\u662f\u4e00\u4e2a\u591a\u5927\u7684\u6570\u5b57\u3002
In C/C++ and some other language (e.g. Java), integers r stored in the memory using 2's complement notation.
For positive integers, their 2's complement notation is of no difference from their binary representation.
Negative integers r slightly more complicated. To achieve their 2's complement notation, u can:
1. get the binary representation of its absolute value;
2. add 1 to that representation.
Of course, there're restrictions of limited memory space.
In this way, negative integers r stored in the memory in quite a same way as positive ones.
e.g. 1111 1111 = -1;
However, for a unsigned integer, it is assumed that no negative integers r stored, i.e. all the numbers r stored using their binary representation. In this case, 1111 1111 = 255.
\u5b8c\u5168\u539f\u521b\uff0c\u770b\u4e0d\u61c2\u7684\u8bdd\u8865\u5145\u8bf4\u660e\u6216\u8005\u53eb\u6211\u7ffb\u8bd1\u3002
有符号数是以补码表示的，最高位是符号位
例如
wire [7:0] a; //无符号数，取值范围0～255
wrie signed [7:0] b;//有符号数，取值范围 -128～127
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